Research Interests

Primary

Electronic Design Automation
Computer Architecture
Soft/Hardware Co-design
Parallel Programming
Software Performance Analysis and Improvement
Performance Modeling

Secondary*

Distributed Computing
Wireless Network
Scientific Computing
Emerging Memory

*: interested but not familiar

Skills

Programming

C/C++, Python, csh/bash, tcl, SKILL (Virtuoso), spice, LaTeX, vim, MATLAB, verilog, html/js

Tools

gdb/lldb, Virtuoso, HSPICE, Calibre, StarRC, CustomCompiler, IC Compiler II, IC Validator, Elasticsearch, Kibana

Casual

photography, badminton, sound mixing, lighting

About

Cheng-Yu (Mike) Tsai is a first-year PhD student at the GTCAD Lab, supervised by Dr. Sung-Kyu Lim in Georgia Tech's ECE department. Before joining the GTCAD Lab, he worked on TSMC's custom design flow team for three years, where his mission was to develop tools embedded in PDK or collaborate with EDA companies to introduce new features that facilitate customers' design efforts. He earned a master's degree in computer science from National Taiwan University (NTU) and double-majored in electrical engineering and computer science at NTU for his bachelor's degree. His MS thesis focused on a performance analytical model that enables design space exploration (DSE) of cache design and understanding workload characteristics.